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IPPS
1999
IEEE
14 years 1 months ago
An Efficient VLSI Architecture Parallel Prefix Counting With Domino Logic
We propose an efficient reconfigurable parallel prefix counting network based on the recently-proposed technique of shift switching with domino logic, where the charge/discharge s...
Rong Lin, Koji Nakano, Stephan Olariu, Albert Y. Z...
COMPCON
1996
IEEE
14 years 1 months ago
Architecture of a Broadband MediaProcessor
A broadband mediaprocessor is a general-purpose computer system which reaches the goal of communicating and processing at broadband rates using compiled software rather than speci...
Craig Hansen
COMPSAC
2005
IEEE
14 years 2 months ago
Toward Stable Software Architecture for Wireless Sensor Networks
This research aims at developing an approach for architecting and communicating software systems in the context of wireless sensor networks. In particular, it focuses on developin...
Nader Mohamed, Haitham S. Hamza
CONEXT
2008
ACM
13 years 10 months ago
Social DTN routing
Delay-tolerant network architectures exploit mobile devices carried by users to enable new networked applications. Efficiently routing information through these DTNs faces new cha...
Greg Bigwood, Tristan Henderson
CCR
2010
132views more  CCR 2010»
13 years 6 months ago
Scafida: a scale-free network inspired data center architecture
Data centers have a crucial role in current Internet architecture supporting content-centric networking. State-of-theart data centers have different architectures like fat-tree [1...
László Gyarmati, Tuan Anh Trinh