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138
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DAC
2007
ACM
16 years 6 months ago
Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations
Due to increased variability trends in nanoscale integrated circuits, statistical circuit analysis has become essential. We present a novel method for post-silicon analysis that g...
Qunzeng Liu, Sachin S. Sapatnekar
CF
2009
ACM
15 years 12 months ago
Strategies for dynamic memory allocation in hybrid architectures
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
Peter Bertels, Wim Heirman, Dirk Stroobandt
DAC
2004
ACM
16 years 6 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
170
Voted
IPPS
2000
IEEE
15 years 9 months ago
Run-Time Support for Adaptive Load Balancing
Abstract. Many parallel scienti c applications have dynamic and irregular computational structure. However, most such applications exhibit persistence of computational load and com...
Milind A. Bhandarkar, Robert Brunner, Laxmikant V....
PPOPP
2012
ACM
14 years 27 days ago
A speculation-friendly binary search tree
We introduce the first binary search tree algorithm designed for speculative executions. Prior to this work, tree structures were mainly designed for their pessimistic (non-specu...
Tyler Crain, Vincent Gramoli, Michel Raynal