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    TCAD
    2010
    97views more  TCAD 2010»
    Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
    13 years 2 months ago
    Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
    Download  cadlab.cs.ucla.edu
    Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
    Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
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    TCAD
    2010
    150views more  TCAD 2010»
    Voltage and Temperature Aware Statistical Leakage Analysis Framework Using Artificial Neural Networks
    13 years 2 months ago
    Voltage and Temperature Aware Statistical Leakage Analysis Framework Using Artificial Neural Networks
    Download  chips.ece.iisc.ernet.in
    Artificial neural networks (ANNs) have shown great promise in modeling circuit parameters for computer aided design applications. Leakage currents, which depend on process paramete...
    Janakiraman Viraraghavan, Bharadwaj Amrutur, V. Vi...
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    TCAD
    2010
    88views more  TCAD 2010»
    Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement
    13 years 2 months ago
    Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement
    Download  www.cerc.utexas.edu
    Starting from the 90nm technology node, process induced stress has played a key role in the design of highperformance devices. The emergence of source/drain silicon germanium (S/D ...
    Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
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    TCAD
    2010
    194views more  TCAD 2010»
    Layout Decomposition Approaches for Double Patterning Lithography
    13 years 2 months ago
    Layout Decomposition Approaches for Double Patterning Lithography
    Download  vlsicad.ucsd.edu
    Abstract--In double patterning lithography (DPL) layout decomposition for 45nm and below process nodes, two features must be assigned opposite colors (corresponding to different ex...
    Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Ya...
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    TCAD
    2010
    124views more  TCAD 2010»
    A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
    13 years 2 months ago
    A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
    Download  www.ece.ucdavis.edu
    Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
    Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas
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