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ICCAD
1997
IEEE
94views Hardware» more  ICCAD 1997»
15 years 8 months ago
High-level scheduling model and control synthesis for a broad range of design applications
This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly su...
Chih-Tung Chen, Kayhan Küçük&cced...
DAC
1997
ACM
15 years 8 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
CHI
1996
ACM
15 years 8 months ago
NewsComm: A Hand-Held Interface for Interactive Access to Structured Audio
The NewsComm system delivers personalized news and other program material as audio to mobile users through a hand-held playback device. This paper focuses on the iterative design ...
Deb K. Roy, Chris Schmandt
ISCAS
1993
IEEE
78views Hardware» more  ISCAS 1993»
15 years 8 months ago
A Multi-layer 2-D Adaptive Filtering Architecture Based on McClellan Transformation
A fully pipelined systolic array structure for multidimensional adaptive filtering is proposed. It utilizes the wellknown McClellan Transformation (MT) to reduce the total number ...
K. J. Ray Liu, An-Yeu Wu
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 8 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan