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DATE
2006
IEEE
151views Hardware» more  DATE 2006»
14 years 1 months ago
An 830mW, 586kbps 1024-bit RSA chip design
This paper presents an RSA hardware design that simultaneously achieves high-performance and lowpower. A bit-oriented, split modular multiplication algorithm and architecture are ...
Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shy...
VVS
1995
IEEE
157views Visualization» more  VVS 1995»
13 years 11 months ago
Cube-3: A Real-Time Architecture for High-Resolution Volume Visualization
This paper describes a high-performance special-purpose system, Cube-3, for displaying and manipulating highresolution volumetric datasets in real-time. A primary goal of Cube-3 i...
Hanspeter Pfister, Arie E. Kaufman, Tzi-cker Chiue...
EUROMICRO
2006
IEEE
14 years 1 months ago
A Modeling Paradigm for Integrated Modular Avionics Design
This paper presents the modeling paradigm for Integrated Modular Avionics Design MIMAD V0, which is an extensible component-oriented framework that enables high level models of sy...
Abdoulaye Gamatié, Christian Brunette, Roma...
ICMCS
2007
IEEE
144views Multimedia» more  ICMCS 2007»
14 years 1 months ago
A Framework for Modular Signal Processing Systems with High-Performance Requirements
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
Lukas Diduch, Ronald Müller, Gerhard Rigoll
DAC
2005
ACM
13 years 9 months ago
Modular domain-specific implementation and exploration framework for embedded software platforms
This paper focuses on designing network processing software for embedded processors. Our design flow CRACC represents an efficient path to implementation based on a modular applic...
Christian Sauer, Matthias Gries, Sören Sonnta...