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FPL
2006
Springer
129views Hardware» more  FPL 2006»
15 years 7 months ago
Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays
We present a heavily parametrized tool suite that allows the modeling and exploration of heterogeneous, coarse-grained, heavily pipelined reconfigurable architectures. Our tools p...
Florian Stock, Andreas Koch
ICRA
2007
IEEE
192views Robotics» more  ICRA 2007»
15 years 9 months ago
Control Architecture for Robot Cells to Enable Plug'n'Produce
- This paper deals with the concept of a control architecture for robot cells that enables Plug’n’Produce according to Plug’n’Play in the office world. To achieve this, a s...
Martin Naumann, Kai Wegener, Rolf Dieter Schraft
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
15 years 8 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
ICSE
1994
IEEE-ACM
15 years 7 months ago
Formalizing Architectural Connection
As software systems become more complex the overall system structure { or software architecture { becomes a central design problem. An important step towards an engineering discip...
Robert J. Allen, David Garlan
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
15 years 9 months ago
System Level Design Space Exploration for Multiprocessor System on Chip
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
Issam Maalej, Guy Gogniat, Jean Luc Philippe, Moha...