1728 search results - page 30 / 346 » The Size of Power Automata |
FORMATS
2003
Springer
14 years 1 months ago
2003
Springer
Timed automata are known not to be complementable or determinizable. Natural questions are, then, could we check whether a given TA enjoys these properties? These problems are not...
ISPD
2012
ACM
12 years 4 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
BMCBI
2010
13 years 8 months ago
2010
Background: Determining a suitable sample size is an important step in the planning of microarray experiments. Increasing the number of arrays gives more statistical power, but ad...
DAC
1994
ACM
14 years 18 days ago
1994
ACM
A stochastic global optimization approach is presented for transistor sizing in CMOS VLSI circuits. This is a direct search strategy for the best design among feasible ones, with ...
COCO
2000
Springer
14 years 3 days ago
2000
Springer
We consider the problem of testing whether the intersection of a collection of k automata is empty. The straightforward algorithm for solving this problem runs in time k where is...