1728 search results - page 35 / 346 » The Size of Power Automata |
ICCAD
2004
IEEE
14 years 6 months ago
2004
IEEE
Abstract— This paper presents a post-route, timingconstrained gate-sizing algorithm for crosstalk reduction. Gate-sizing has emerged as a practical and feasible method to reduce ...
DAC
1996
ACM
14 years 1 months ago
1996
ACM
Hot-carrier eects and electromigration are the two important failure mechanisms that signi cantly impact the long-term reliability of high-density VLSI ICs. In this paper, we prese...
JUCS
2006
13 years 9 months ago
2006
: In this paper we describe a technique for monitoring and checking temporal logic assertions augmented with real-time and time-series constraints, or Metric Temporal Logic Series ...
RTCSA
2007
IEEE
14 years 4 months ago
2007
IEEE
Code optimization of the offset assignment generated in embedded systems allows for power and space efficient systems. We propose a new heuristic that uses edge classification to ...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Sparse superposition codes are developed for the additive white Gaussian noise channel with average codeword power constraint. Codewords are linear combinations of subsets of vecto...