In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
This article presents a new adaptive framework for locally parallel texture modeling. Oscillating patterns are modeled with functionals that constrain the local Fourier decompositi...
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
A large class of systems of biological and technological relevance can be described as analog networks, that is, collections of dynamic devices interconnected by links of varying s...
Claudio Mattiussi, Daniel Marbach, Peter Dürr, Da...