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ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 2 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
ISCA
2010
IEEE
210views Hardware» more  ISCA 2010»
14 years 2 months ago
An intra-chip free-space optical interconnect
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless s...
Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun ...
TRUST
2010
Springer
14 years 2 months ago
Beyond Kernel-Level Integrity Measurement: Enabling Remote Attestation for the Android Platform
Abstract. Increasing adoption of smartphones in recent times has begun to attract more and more malware writers towards these devices. Among the most prominent and widely adopted o...
Mohammad Nauman, Sohail Khan, Xinwen Zhang, Jean-P...
APSEC
2002
IEEE
14 years 2 months ago
iBistro: A Learning Environment for Knowledge Construction in Distributed Software Engineering Courses
We have taught several distributed software engineering project courses with students and real clients [4]. During these projects, students in Pittsburgh and Munich, Germany colla...
Andreas Braun, Allen H. Dutoit, Andreas Harrer, Be...
HICSS
2002
IEEE
116views Biometrics» more  HICSS 2002»
14 years 2 months ago
E-commerce Security Issues
Without trust, most prudent business operators and clients may decide to forgo use of the Internet and revert back to traditional methods of doing business. To counter this trend,...
Randy C. Marchany, Joseph G. Tront
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