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DATE
2004
IEEE
119views Hardware» more  DATE 2004»
14 years 7 days ago
Configuration-Sensitive Process Scheduling for FPGA-Based Computing Platforms
Reconfigurable computing has become an important part of research in software systems and computer architecture. While prior research on reconfigurable computing have addressed ar...
Guilin Chen, Mahmut T. Kandemir, Ugur Sezer
ASPDAC
2001
ACM
82views Hardware» more  ASPDAC 2001»
14 years 5 days ago
Reusable embedded in-circuit emulator
In this paper, we o introduce the Reusable Embedded In-Circuit Emulator (EICE) and Reusable EICE development system. The main function in EICE we design are testing and debugging. ...
Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao
ARC
2008
Springer
104views Hardware» more  ARC 2008»
13 years 10 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
FPL
2008
Springer
125views Hardware» more  FPL 2008»
13 years 10 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...
ERSA
2008
103views Hardware» more  ERSA 2008»
13 years 10 months ago
A Hardware Accelerator for k-th Nearest Neighbor Thinning
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
Tobias Schumacher, Robert Meiche, Paul Kaufmann, E...