862 search results - page 138 / 173 » The amorphous FPGA architecture |
SIGCOMM
2010
ACM
13 years 8 months ago
2010
ACM
Generating realistic and responsive traffic that reflects different network conditions is a challenging problem associated with performing valid experiments in network testbeds. I...
MJ
2006
13 years 8 months ago
2006
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
JUCS
2007
13 years 8 months ago
2007
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
VLSISP
2008
13 years 7 months ago
2008
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
ERSA
2010
13 years 6 months ago
2010
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...