182 search results - page 25 / 37 » The cache complexity of multithreaded cache oblivious algori... |
VLDB
2005
ACM
14 years 27 days ago
2005
ACM
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
SPAA
2004
ACM
14 years 25 days ago
2004
ACM
We present the Buffer Heap (BH), a cache-oblivious priority queue that supports Delete-Min, Delete, and Decrease-Key operations in O( 1 B log2 N B ) amortized block transfers fro...
USENIX
2007
13 years 9 months ago
2007
This paper focuses on evaluation of the effectiveness of optimization at various layers of the IO path, such as the file system, the device driver scheduler, and the disk drive i...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
The key to high performance in Simultaneous Multithreaded (SMT) processors lies in optimizing the distribution of shared resources to active threads. Existing resource distributio...