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SPAA
2010
ACM
14 years 5 days ago
Towards optimizing energy costs of algorithms for shared memory architectures
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...
Vijay Anand Korthikanti, Gul Agha
MOBIHOC
2008
ACM
14 years 7 months ago
Rendezvous design algorithms for wireless sensor networks with a mobile base station
Recent research shows that significant energy saving can be achieved in wireless sensor networks with a mobile base station that collects data from sensor nodes via short-range co...
Guoliang Xing, Tian Wang, Weijia Jia, Minming Li
HPCA
2009
IEEE
14 years 8 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
EMSOFT
2010
Springer
13 years 5 months ago
Optimal WCET-aware code selection for scratchpad memory
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
Hui Wu, Jingling Xue, Sridevan Parameswaran
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
14 years 29 days ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...