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VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
14 years 9 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
EUROPAR
2010
Springer
13 years 7 months ago
A Language-Based Tuning Mechanism for Task and Pipeline Parallelism
Abstract. Current multicore computers differ in many hardware aspects. Tuning parallel applications is indispensable to achieve best performance on a particular hardware platform....
Frank Otto, Christoph A. Schaefer, Matthias Dempe,...
CDC
2008
IEEE
102views Control Systems» more  CDC 2008»
14 years 3 months ago
Area-constrained coverage optimization by robotic sensor networks
Abstract— This paper studies robotic sensor networks performing coverage optimization tasks with area constraints. The network coverage of the environment is a function of the ro...
Jorge Cortés
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
14 years 2 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali
DMTCS
2003
93views Mathematics» more  DMTCS 2003»
13 years 10 months ago
Two Philosophical Applications of Algorithmic Information Theory
Two philosophical applications of the concept of program-size complexity are discussed. First, we consider the light program-size complexity sheds on whether mathematics is invent...
Gregory J. Chaitin