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VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
14 years 3 months ago
Interfacing Cores with On-chip Packet-Switched Networks
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
Praveen Bhojwani, Rabi N. Mahapatra
ISVLSI
2002
IEEE
81views VLSI» more  ISVLSI 2002»
14 years 2 months ago
Impact of Technology Scaling in the Clock System Power
The clock distribution and generation circuitry is known to consume more than a quarter of the power budget of existing microprocessors. A previously derived clock energy model is...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
CASES
2001
ACM
14 years 1 months ago
Energy-efficient instruction cache using page-based placement
Energy consumption is a crucial factor in designing batteryoperated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments...
Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. K...
ISCA
1997
IEEE
119views Hardware» more  ISCA 1997»
14 years 1 months ago
The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference
Deeply pipelined, superscalar processors require accurate branch prediction to achieve high performance. Two-level branch predictors have been shown to achieve high prediction acc...
Eric Sprangle, Robert S. Chappell, Mitch Alsup, Ya...
AISC
2008
Springer
13 years 12 months ago
Cross-Curriculum Search for Intergeo
Intergeo is a European project dedicated to the sharing of interactive geometry constructions. This project is setting up an annotation and search web platform which will offer and...
Paul Libbrecht, Cyrille Desmoulins, Christian Merc...