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» The design of a high performance low power microprocessor
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ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 3 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
DSN
2011
IEEE
12 years 8 months ago
High performance state-machine replication
Computer systems are usually made fault tolerant through replication. By replicating a service on multiple servers we make sure that if some replicas fail, the service can still b...
Parisa Jalili Marandi, Marco Primi, Fernando Pedon...
ISCA
2002
IEEE
112views Hardware» more  ISCA 2002»
14 years 1 months ago
Drowsy Caches: Simple Techniques for Reducing Leakage Power
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
Krisztián Flautner, Nam Sung Kim, Steven M....
CODES
2008
IEEE
13 years 10 months ago
Profiling of lossless-compression algorithms for a novel biomedical-implant architecture
In view of a booming market for microelectronic implants, our ongoing research work is focusing on the specification and design of a novel biomedical microprocessor core targeting...
Christos Strydis, Georgi Gaydadjiev
DRMTICS
2005
Springer
14 years 2 months ago
A Vector Approach to Cryptography Implementation
The current deployment of Digital Right Management (DRM) schemes to distribute protected contents and rights is leading the way to massive use of sophisticated embedded cryptograph...
Jacques J. A. Fournier, Simon W. Moore