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ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 3 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
IPSN
2010
Springer
14 years 1 months ago
User-centric radio power control for opportunistic mountain hiking networks
bstract: User-Centric Radio Power Control for Opportunistic Mountain Hiking Networks ∗ Jyh-How Huang1 , Po-Yen Lin1 , Yu-Te Huang2 , Seng-Yong Lau1 , Ling-Jyh Chen2 , Kun-chan La...
Jyh-How Huang, Po-Yen Lin, Yu-Te Huang, Seng-Yong ...
LCTRTS
2010
Springer
14 years 1 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
INFOCOM
2009
IEEE
14 years 1 months ago
Duty-Cycle-Aware Broadcast in Wireless Sensor Networks
—Broadcast is one of the most fundamental services in wireless sensor networks (WSNs). It facilitates sensor nodes to propagate messages across the whole network, serving a wide ...
Feng Wang, Jiangchuan Liu
ICPPW
2007
IEEE
14 years 27 days ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu