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» The design of a low energy FPGA
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SBCCI
2005
ACM
115views VLSI» more  SBCCI 2005»
14 years 2 months ago
Design of a decompressor engine on a SPARC processor
Code compression, initially conceived as an effective technique to reduce code size in embedded systems, today also brings advantages in terms of performance and energy consumpti...
Richard E. Billo, Rodolfo Azevedo, Guido Araujo, P...
HAPTICS
2005
IEEE
14 years 2 months ago
A FPGA Haptics Controller
Wearable haptics necessitates using low power, small, inexpensive tactors that are typically used as pager motors in cellular phones. One of their limitations is that it appears t...
Marc Holbein, John S. Zelek
ISLPED
1997
ACM
106views Hardware» more  ISLPED 1997»
14 years 5 hour ago
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
CIT
2004
Springer
14 years 1 months ago
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
Abstract. Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. W...
Saraju P. Mohanty, Renuka Kumara C., Sridhara Naya...
FPL
2004
Springer
98views Hardware» more  FPL 2004»
14 years 1 months ago
Power-Driven Design Partitioning
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
Rajarshi Mukherjee, Seda Ogrenci Memik