The programmable clock networks in FPGAs have a significant impact on overall power, area, and delay. Not only does the clock network itself dissipate a significant amount of powe...
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...
—Network protocols have traditionally been designed using a layered method in part because it is easier to implement some portions of network protocols in software and other port...
Dola Saha, Aveek Dutta, Dirk Grunwald, Douglas C. ...
Low-cost and low-power video surveillance systems based on networks of wireless video sensors will enter soon the marketplace with the promise of flexibility, quick deployment an...
Acknowledging the intense requirement for low power operation in most portable computing systems, this paper introduces the notion of energy efficient software design and proposes ...