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» The design of a low energy FPGA
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LCN
2006
IEEE
14 years 2 months ago
Ethernet Adaptive Link Rate: System Design and Performance Evaluation
The Internet and the devices that connect to it consume a growing and significant amount of electricity. The utilization of desktop to switch Ethernet links is generally very low ...
Chamara Gunaratne, Kenneth J. Christensen
ICASSP
2010
IEEE
13 years 8 months ago
Design of sparse filters for channel shortening
Abstract—Channel shortening filters have been used in acoustics to reduce reverberation, in error control decoding to reduce complexity, and in communication systems to reduce i...
Aditya Chopra, Brian L. Evans
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 5 months ago
Integrated circuit design with NEM relays
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King L...
ISORC
2008
IEEE
14 years 2 months ago
The Complexity Challenge in Embedded System Design
The specific constraints that must be satisfied by embedded systems, such as timeliness, energy efficiency of battery-operated devices, dependable operation in safety-relevant sce...
Hermann Kopetz
ASAP
2009
IEEE
157views Hardware» more  ASAP 2009»
14 years 5 months ago
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
Andreas Genser, Christian Bachmann, Christian Steg...