Sciweavers

517 search results - page 4 / 104
» The design of a low energy FPGA
Sort
View
ISLPED
2010
ACM
236views Hardware» more  ISLPED 2010»
13 years 7 months ago
Analysis and design of ultra low power thermoelectric energy harvesting systems
Thermal energy harvesting using micro-scale thermoelectric generators is a promising approach to alleviate the power supply challenge in ultra low power systems. In thermal energy...
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaush...
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 4 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu
ISVLSI
2008
IEEE
143views VLSI» more  ISVLSI 2008»
14 years 1 months ago
BTB Access Filtering: A Low Energy and High Performance Design
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras
ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
14 years 7 days ago
Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for applicationspecific systems, called VAbM technique. It targets th...
Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma,...
ERSA
2007
142views Hardware» more  ERSA 2007»
13 years 8 months ago
An FPGA Implementation of Reciprocal Sums for SPME
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is...
Sam Lee, Paul Chow