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ICS
2009
Tsinghua U.
14 years 1 months ago
Parametric multi-level tiling of imperfectly nested loops
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
Albert Hartono, Muthu Manikandan Baskaran, C&eacut...
ICDCS
2008
IEEE
14 years 1 months ago
PFC: Transparent Optimization of Existing Prefetching Strategies for Multi-Level Storage Systems
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
Zhe Zhang, Kyuhyung Lee, Xiaosong Ma, Yuanyuan Zho...
SLIP
2003
ACM
14 years 6 days ago
Perimeter-degree: a priori metric for directly measuring and homogenizing interconnection complexity in multilevel placement
In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...
Navaratnasothie Selvakkumaran, Phiroze N. Parakh, ...
ICCAD
2005
IEEE
118views Hardware» more  ICCAD 2005»
14 years 3 months ago
Thermal via planning for 3-D ICs
Heat dissipation is one of the most serious challenges in 3D IC designs. One effective way of reducing circuit temperature is to introduce thermal through-the-silicon (TTS) vias....
Jason Cong, Yan Zhang
ISPD
2003
ACM
121views Hardware» more  ISPD 2003»
14 years 6 days ago
Optimality, scalability and stability study of partitioning and placement algorithms
This paper studies the optimality, scalability and stability of stateof-the-art partitioning and placement algorithms. We present algorithms to construct two classes of benchmarks...
Jason Cong, Michail Romesis, Min Xie