Thermal via planning for 3-D ICs

Heat dissipation is one of the most serious challenges in 3D IC designs. One effective way of reducing circuit temperature is to introduce thermal through-the-silicon (TTS) vias. In this paper, we extended the TTS-via planning in a multilevel routing framework as in [7], but use a much enhanced TTS-via planning algorithm. We formulate the TTSvia minimization problem with temperature constraints as a constrained nonlinear programming problem (NLP) based on the thermal resistive model and develop an efficient heuristic algorithm, named m-ADVP, which solves a sequence of simplified via planning subproblems in alternating direction in a multilevel framework. The vertical via distribution is formulated as a convex programming problem, and the horizontal via planning is based on two efficient techniques: path counting and heat propagation. Experimental results show that the m-ADVP algorithm is more than 200× faster than the direct solution to the NPL formulation for via planning with ver...

• Type: Conference
• Year: 2005
• Where: ICCAD
• Authors: Jason Cong, Yan Zhang
• Keywords: Hardware, ICCAD 2005, Multilevel Routing Framework, Planning Algorithm, TTS-via Planning Algorithm