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» The domino effect
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VTS
1997
IEEE
90views Hardware» more  VTS 1997»
13 years 11 months ago
SHOrt voltage elevation (SHOVE) test for weak CMOS ICs
A stress procedure for reliability screening, SHOrt Voltage Elevation (SHOVE) test, is analyzed here. During SHOVE, test vectors are run at higher-than-normal supply voltage for a...
Jonathan T.-Y. Chang, Edward J. McCluskey
DAC
2007
ACM
14 years 8 months ago
Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift
Statistical behavior of device leakage and threshold voltage shows a strong width dependency under microscopic random dopant fluctuation. Leakage estimation using the conventional...
Jie Gu, Sachin S. Sapatnekar, Chris H. Kim
ISLPED
2000
ACM
68views Hardware» more  ISLPED 2000»
13 years 11 months ago
Noise-aware power optimization for on-chip interconnect
Realization of high-performance domino logic depends strongly on energy-efficient and noise-tolerant interconnect design in ultra deep sub-micron processes. We characterize the c...
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L....
TPDS
1998
135views more  TPDS 1998»
13 years 6 months ago
On Coordinated Checkpointing in Distributed Systems
—Coordinated checkpointing simplifies failure recovery and eliminates domino effects in case of failures by preserving a consistent global checkpoint on stable storage. However, ...
Guohong Cao, Mukesh Singhal
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 11 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...