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RTCSA
2007
IEEE
14 years 2 months ago
A NOR Emulation Strategy over NAND Flash Memory
This work is motivated by a strong market demand in the replacement of NOR flash memory with NAND flash memory to cut down the cost in many embedded-system designs, such as mobi...
Jian-Hong Lin, Yuan-Hao Chang, Jen-Wei Hsieh, Tei-...
ASAP
2007
IEEE
203views Hardware» more  ASAP 2007»
14 years 17 days ago
Reconfigurable Universal Adder
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
Humberto Calderon, Georgi Gaydadjiev, Stamatis Vas...
CDES
2006
98views Hardware» more  CDES 2006»
13 years 10 months ago
Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer
Recently, several loop buffer designs have been proposed to reduce instruction fetch energy due to size and location advantage of loop buffer. Nevertheless, on design complexity di...
Bin-Hua Tein, I-Wei Wu, Chung-Ping Chung
ECAI
2010
Springer
13 years 6 months ago
Feature Selection by Approximating the Markov Blanket in a Kernel-Induced Space
The proposed feature selection method aims to find a minimum subset of the most informative variables for classification/regression by efficiently approximating the Markov Blanket ...
Qiang Lou, Zoran Obradovic
INFOCOM
2000
IEEE
14 years 4 days ago
A Predictability Analysis of Network Traffic
This paper assesses the predictability of network traffic by considering two metrics: (1) how far into the future a traffic rate process can be predicted with bounded error; (2) w...
Aimin Sang, San-qi Li