Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
This paper presents a technique to visualize the communication pattern of a parallel application at different points during its execution. Unlike many existing tools that show the...
Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, ...
We describe an extension to the Java programming language that supports static conformance checking and dynamic debugging of object "protocols," i.e., sequencing constra...
Sergey Butkevich, Marco Renedo, Gerald Baumgartner...
Instrumenting programs with code to monitor runtime behavior is a common technique for profiling and debugging. In practice, instrumentation is either inserted manually by progra...
Simon Goldsmith, Robert O'Callahan, Alexander Aike...