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EH
2000
IEEE
183views Hardware» more  EH 2000»
14 years 2 months ago
A Reconfigurable Platform for the Automatic Synthesis of Analog Circuits
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
Ricardo Salem Zebulum, Cristina Costa Santini, Hel...
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
14 years 2 months ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki
ICPR
2002
IEEE
14 years 11 months ago
Implementing Image Applications on FPGAs
The Cameron project has developed a language and compiler for mapping image-based applications to field programmable gate arrays (FPGAs). This paper tests this technology on sever...
A. P. Wim Böhm, Bruce A. Draper, Charles Ross...
IJCNN
2007
IEEE
14 years 4 months ago
A Hardware-friendly Support Vector Machine for Embedded Automotive Applications
— We present here a hardware–friendly version of the Support Vector Machine (SVM), which is useful to implement its feed–forward phase on limited–resources devices such as ...
Davide Anguita, Alessandro Ghio, Stefano Pischiutt...
FPL
2008
Springer
98views Hardware» more  FPL 2008»
13 years 11 months ago
Comparing throughput and power consumption in both sequential and reconfigurable processors
Recent improvements in the memory capacity of Field Programmable Gate Arrays (FPGAs) have spurred interest in using the devices for arithmetic floating-point operations. However, ...
Kevin K. Liu, Charles B. Cameron, Antal A. Sarkady