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The impact of battery capacity and memory bandwidth on CPU s...
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ISLPED
1999
ACM
107
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ISLPED 1999
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The impact of battery capacity and memory bandwidth on CPU speed-setting: a case study
14 years 1 months ago
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www.ece.vt.edu
Thomas L. Martin, Daniel P. Siewiorek
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MICRO
2003
IEEE
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MICRO 2003
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Reducing Design Complexity of the Load/Store Queue
14 years 2 months ago
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cobweb.ecn.purdue.edu
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar
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