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VTS
2006
IEEE
122views Hardware» more  VTS 2006»
14 years 1 months ago
Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions
We tackle the problem of fault-free assumptions in current PLB and interconnect built-in-self-test (BIST) techniques for FPGAs. These assumptions were made in order to develop stro...
Vishal Suthar, Shantanu Dutt
ASPLOS
2006
ACM
14 years 1 months ago
Introspective 3D chips
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
Shashidhar Mysore, Banit Agrawal, Navin Srivastava...
SPAA
2006
ACM
14 years 1 months ago
On space-stretch trade-offs: lower bounds
One of the fundamental trade-offs in compact routing schemes is between the space used to store the routing table on each node and the stretch factor of the routing scheme – th...
Ittai Abraham, Cyril Gavoille, Dahlia Malkhi
SPAA
2006
ACM
14 years 1 months ago
On space-stretch trade-offs: upper bounds
One of the fundamental trade-offs in compact routing schemes is between the space used to store the routing table on each node and the stretch factor of the routing scheme – th...
Ittai Abraham, Cyril Gavoille, Dahlia Malkhi
INFOCOM
2005
IEEE
14 years 1 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas