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HPCA
1999
IEEE
14 years 27 days ago
The Synergy of Multithreading and Access/Execute Decoupling
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
Joan-Manuel Parcerisa, Antonio González
ASPLOS
1992
ACM
14 years 20 days ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
IEEEPACT
2006
IEEE
14 years 2 months ago
Two-level mapping based cache index selection for packet forwarding engines
Packet forwarding is a memory-intensive application requiring multiple accesses through a trie structure. The efficiency of a cache for this application critically depends on the ...
Kaushik Rajan, Ramaswamy Govindarajan
ACMMSP
2004
ACM
131views Hardware» more  ACMMSP 2004»
14 years 2 months ago
Reuse-distance-based miss-rate prediction on a per instruction basis
Feedback-directed optimization has become an increasingly important tool in designing and building optimizing compilers. Recently, reuse-distance analysis has shown much promise i...
Changpeng Fang, Steve Carr, Soner Önder, Zhen...
JMLR
2008
168views more  JMLR 2008»
13 years 8 months ago
Max-margin Classification of Data with Absent Features
We consider the problem of learning classifiers in structured domains, where some objects have a subset of features that are inherently absent due to complex relationships between...
Gal Chechik, Geremy Heitz, Gal Elidan, Pieter Abbe...