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POPL
2009
ACM
14 years 8 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...
ASPLOS
2009
ACM
14 years 8 months ago
Commutativity analysis for software parallelization: letting program transformations see the big picture
Extracting performance from many-core architectures requires software engineers to create multi-threaded applications, which significantly complicates the already daunting task of...
Farhana Aleen, Nathan Clark
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
IEEEPACT
2005
IEEE
14 years 1 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
ICTAC
2004
Springer
14 years 1 months ago
Object Connectivity and Full Abstraction for a Concurrent Calculus of Classes
onnectivity and Full Abstraction for a Concurrent Calculus of Classes⋆ nded Abstract — Erika ´Abrah´am2 , Marcello M. Bonsangue3 , Frank S. de Boer4 , and Martin Steffen1 1 ...
Erika Ábrahám, Marcello M. Bonsangue...