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» The performance of circuit switching in the internet
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ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
14 years 4 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
14 years 3 months ago
FSM decomposition by direct circuit manipulation applied to low power design
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
José C. Monteiro, Arlindo L. Oliveira
IJNSEC
2007
123views more  IJNSEC 2007»
13 years 10 months ago
Secure Error Signalling for Packet-Switched Networks - The Future Core Networks System Error Protocol
In this paper a secure error-signalling scheme for packetswitched network architectures is presented. Current solutions are based on the Internet Control Message Protocol to deliv...
Theodore Stergiou, Dimitrios L. Delivasilis
TON
1998
80views more  TON 1998»
13 years 10 months ago
Blocking and nonblocking multirate Clos switching networks
— This paper investigates in detail the blocking and nonblocking behavior of multirate Clos switching networks at the connection/virtual connection level. The results are applica...
Soung C. Liew, Ming-Hung Ng, Cathy W. Chan
LCN
2003
IEEE
14 years 4 months ago
An Optoelectronic Multi-Terabit CMOS Switch Core for Local Area Networks
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
Honglin Wu, Amir Gourgy, Ted H. Szymanski