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SIGSOFT
2005
ACM
14 years 8 months ago
Arithmetic program paths
We present Arithmetic Program Paths, a novel, efficient way to compress program control-flow traces that reduces program bit traces to less than a fifth of their original size whi...
Manos Renieris, Shashank Ramaprasad, Steven P. Rei...
IPPS
2003
IEEE
14 years 27 days ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
RTSS
2003
IEEE
14 years 26 days ago
Experimental Evaluation of Code Properties for WCET Analysis
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
Antoine Colin, Stefan M. Petters
ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
13 years 12 months ago
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs
Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynam...
Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
ISCA
1998
IEEE
135views Hardware» more  ISCA 1998»
13 years 12 months ago
Confidence Estimation for Speculation Control
Modern processors improve instruction level parallelism by speculation. The outcome of data and control decisions is predicted, and the operations are speculatively executed and o...
Dirk Grunwald, Artur Klauser, Srilatha Manne, Andr...