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HPCA
1997
IEEE
13 years 11 months ago
Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler g...
David I. August, Daniel A. Connors, John C. Gyllen...
FCCM
2008
IEEE
112views VLSI» more  FCCM 2008»
14 years 1 months ago
Power-Aware and Branch-Aware Word-Length Optimization
Power reduction is becoming more important as circuit size increases. This paper presents a tool called PowerCutter which employs accuracy-guaranteed word-length optimization to r...
William G. Osborne, José Gabriel F. Coutinh...
RTAS
2003
IEEE
14 years 22 days ago
Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction
This paper investigates how dynamic branch prediction in a microprocessor affects the predictability of execution time for software running on that processor. By means of experim...
Jakob Engblom
CTRSA
2007
Springer
111views Cryptology» more  CTRSA 2007»
14 years 1 months ago
Predicting Secret Keys Via Branch Prediction
This paper announces a new software side-channel attack — enabled by the branch prediction capability common to all modern highperformance CPUs. The penalty paid (extra clock cyc...
Onur Aciiçmez, Çetin Kaya Koç...
PLDI
2005
ACM
14 years 1 months ago
Code placement for improving dynamic branch prediction accuracy
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
Daniel A. Jiménez