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VTS
2005
IEEE
116views Hardware» more  VTS 2005»
14 years 4 days ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
WSC
2007
13 years 9 months ago
Simulation metamodels for modeling output distribution parameters
Metamodels are functions with calibrated parameters, used actions and simplifications of the simulation model. A metamodel exposes the system’s input-output relationship and ca...
Isabel R. Santos, Pedro R. Santos
EUROSYS
2007
ACM
14 years 3 months ago
Exploiting nonstationarity for performance prediction
Real production applications ranging from enterprise applications to large e-commerce sites share a crucial but seldom-noted characteristic: The relative frequencies of transactio...
Christopher Stewart, Terence Kelly, Alex Zhang
ASPLOS
2000
ACM
13 years 11 months ago
FLASH vs. (Simulated) FLASH: Closing the Simulation Loop
Simulation is the primary method for evaluating computer systems during all phases of the design process. One significant problem with simulation is that it rarely models the syst...
Jeff Gibson, Robert Kunz, David Ofelt, Mark Heinri...
ISPW
2008
IEEE
14 years 29 days ago
Accurate Estimates without Calibration?
Most process models calibrate their internal settings using historical data. Collecting this data is expensive, tedious, and often an incomplete process. Is it possible to make acc...
Tim Menzies, Oussama El-Rawas, Barry W. Boehm, Ray...