98 search results - page 19 / 20 » The scaling of interconnect buffer needs |
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
OOPSLA
2005
Springer
14 years 1 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
CAL
2007
13 years 7 months ago
2007
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
PDCN
2004
13 years 9 months ago
2004
It is wellknown that http servers can be programmed easier by using multithreading, i.e. each connection is dealt with by a separate thread. It is also known, e.g. from massively ...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...