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ISCAS
2008
IEEE
104views Hardware» more  ISCAS 2008»
14 years 1 months ago
Reducing the effects of component mismatch by using relative size information
—This paper shows how the relative size of components can be used to increase matching performance – saving orders of magnitude in component area. The relative size information...
B. Robert Gregoire, Un-Ku Moon
SIAMSC
2010
142views more  SIAMSC 2010»
13 years 2 months ago
Hypergraph-Based Unsymmetric Nested Dissection Ordering for Sparse LU Factorization
In this paper we present HUND, a hypergraph-based unsymmetric nested dissection ordering algorithm for reducing the fill-in incurred during Gaussian elimination. HUND has several i...
Laura Grigori, Erik G. Boman, Simplice Donfack, Ti...
SIAMSC
2011
142views more  SIAMSC 2011»
13 years 2 months ago
Efficiency Based Adaptive Local Refinement for First-Order System Least-Squares Formulations
Abstract. In this paper, we propose new adaptive local refinement (ALR) strategies for firstorder system least-squares (FOSLS) finite element in conjunction with algebraic multi...
J. H. Adler, Thomas A. Manteuffel, Stephen F. McCo...
ISCA
1991
IEEE
110views Hardware» more  ISCA 1991»
13 years 11 months ago
Dynamic Base Register Caching: A Technique for Reducing Address Bus Width
When address reference streams exhibit high degrees of spatial and temporal locality, many of the higher order address lines carry redundant information. By caching the higher ord...
Matthew K. Farrens, Arvin Park
SBACPAD
2005
IEEE
139views Hardware» more  SBACPAD 2005»
14 years 1 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
Miquel Pericàs, Adrián Cristal, Rube...