33 search results - page 4 / 7 » Thermal-Aware Clustered Microarchitectures |
SBACPAD
2005
IEEE
14 years 29 days ago
2005
IEEE
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
ISCA
2003
IEEE
14 years 20 days ago
2003
IEEE
Clustered microarchitectures are an attractive alternative to large monolithic superscalar designs due to their potential for higher clock rates in the face of increasingly wire-d...
APCSAC
2007
IEEE
13 years 11 months ago
2007
IEEE
Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary cha...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
Microarchitectural simulation is orders of magnitude slower than native execution. As more elements are accurately modeled, problems associated with slow simulation are further ex...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
In this paper we present a clustered, multiple-clock domain (CMCD) microarchitecture that combines the benefits of both clustering and Globally Asynchronous Locally Synchronous (G...