146 search results - page 8 / 30 » Thread Level Parallelism and Interactive Performance of Desk... |
IPPS
2000
IEEE
14 years 3 days ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
EUROPAR
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. This paper presents the XJava compiler for parallel programs. It exploits parallelism based on an object-oriented stream programming paradigm. XJava extends Java with new...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
s the Pus using the OpenCL API as the platform independent programming model. It has the proposal to extend OpenCL with a module that schedule and balance the workload over the CPU...