Sciweavers

1476 search results - page 227 / 296
» Three-dimensional integrated circuits
Sort
View
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
14 years 3 months ago
Closed form expressions for extending step delay and slew metrics to ramp inputs
: Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these...
Chandramouli V. Kashyap, Charles J. Alpert, Frank ...
GLVLSI
2010
IEEE
171views VLSI» more  GLVLSI 2010»
14 years 3 months ago
Timing-driven variation-aware nonuniform clock mesh synthesis
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
Ameer Abdelhadi, Ran Ginosar, Avinoam Kolodny, Eby...
GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
14 years 2 months ago
Non-Refreshing Analog Neural Storage Tailored for On-Chip Learning
In this research, we devised a new simple technique for statically holding analog weights, which does not require periodic refreshing. It further contains a mechanism to locally u...
Bassem A. Alhalabi, Qutaibah M. Malluhi, Rafic A. ...
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
14 years 2 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
DAC
2005
ACM
14 years 4 days ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...