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NIPS
1992
13 years 10 months ago
Silicon Auditory Processors as Computer Peripherals
Several research groups are implementing analog integrated circuit models of biological auditory processing. The outputs of these circuit models have taken several forms, includin...
John Lazzaro, John Wawrzynek, Misha Mahowald, Mass...
DAC
2011
ACM
12 years 8 months ago
Efficient incremental analysis of on-chip power grid via sparse approximation
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...
Pei Sun, Xin Li, Ming Yuan Ting
DAC
2007
ACM
14 years 10 months ago
Enhancing FPGA Performance for Arithmetic Circuits
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Par...
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 6 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...
ISLPED
2009
ACM
100views Hardware» more  ISLPED 2009»
14 years 3 months ago
Tuning-friendly body bias clustering for compensating random variability in subthreshold circuits
Post-fabrication tuning for mitigating manufacturing variability is receiving a significant attention. To reduce leakage increase involved in performance compensation by body bia...
Koichi Hamamoto, Masanori Hashimoto, Yukio Mitsuya...