—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
In this paper, we present a new multipacking-tree (MP-tree) representation for macro placements to handle modern mixed-size designs with large macros and high chip utilization rate...
The use of topological features, more specifically, the importance of an element related to its structural position is a subject widely studied. For instance, complex networks theo...
Eduardo M. R. Oliveira, Heitor S. Ramos, Antonio A...
Abstract— We propose a unified cross layer routing protocol with multiple constraints for CDMA multihop cellular networks (MCN). Multiple constraints are imposed on intermediate...
Govindan Kannan, Shabbir N. Merchant, Uday B. Desa...
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...