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VLSID
2002
IEEE
172views VLSI» more  VLSID 2002»
14 years 8 months ago
Improvement of ASIC Design Processes
With device counts on modern-day ASICs crossing the 10 million mark, careful planning of an ASIC design project is necessary to meet time deadlines. Two problems arise in this con...
Vineet Sahula, C. P. Ravikumar, D. Nagchoudhuri
SIGMOD
2005
ACM
141views Database» more  SIGMOD 2005»
14 years 8 months ago
Integrating databases and workflow systems
There has been an information explosion in fields of science such as high energy physics, astronomy, environmental sciences and biology. There is a critical need for automated sys...
Srinath Shankar, Ameet Kini, David J. DeWitt, Jeff...
SDM
2009
SIAM
204views Data Mining» more  SDM 2009»
14 years 5 months ago
Application of Bayesian Partition Models in Warranty Data Analysis.
Automotive companies are forced to continuously extend and improve their product line-up. However, increasing diversity, higher design complexity, and shorter development cycles c...
Axel Blumenstock, Christoph Schlieder, Markus M&uu...
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 4 months ago
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design
I/O placement has always been a concern in modern IC design. Due to flip-chip technology, I/O can be placed throughout the whole chip without long wires from the periphery of the...
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzh...
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 4 months ago
Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing
We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by ...
Tianpei Zhang, Sachin S. Sapatnekar