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FCCM
2008
IEEE
205views VLSI» more  FCCM 2008»
14 years 4 months ago
Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation
The recent turmoil in global credit markets has demonstrated the need for advanced modelling of credit risk, which can take into account the effects of changing economic condition...
David B. Thomas, Wayne Luk
EUROCRYPT
2007
Springer
14 years 4 months ago
Non-wafer-Scale Sieving Hardware for the NFS: Another Attempt to Cope with 1024-Bit
Significant progress in the design of special purpose hardware for supporting the Number Field Sieve (NFS) has been made. From a practical cryptanalytic point of view, however, no...
Willi Geiselmann, Rainer Steinwandt
EUROPAR
2005
Springer
14 years 3 months ago
PerfMiner: Cluster-Wide Collection, Storage and Presentation of Application Level Hardware Performance Data
Abstract. We present PerfMiner, a system for the transparent collection, storage and presentation of thread-level hardware performance data across an entire cluster. Every sub-proc...
Philip Mucci, Daniel Ahlin, Johan Danielsson, Per ...
IPPS
2003
IEEE
14 years 3 months ago
Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandr...
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
14 years 3 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...