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DAC
2003
ACM
14 years 3 months ago
A timing-accurate modeling and simulation environment for networked embedded systems
The design of state-of-the-art, complex embedded systems requires the capability of modeling and simulating the complex networked environment in which such systems operate. This i...
Franco Fummi, Giovanni Perbellini, Paolo Gallo, Ma...
DAC
2003
ACM
14 years 3 months ago
Advanced techniques for RTL debugging
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Sh...
ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
14 years 3 months ago
Understanding and minimizing ground bounce during mode transition of power gating structures
We introduce and analyze the ground bounce due to power mode transition in power gating structures. To reduce the ground bounce, we propose novel power gating structures in which ...
Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel
ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
14 years 3 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
14 years 3 months ago
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle co...
Dongkun Shin, Jihong Kim
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