ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
Distributedmultimedia applicationsrequire performanceguarantees from the underlying network subsystem. Ethernet has been the dominant local area network architecture in the last d...
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...
With continuing scaling of CMOS process, process variations in the form of die-to-die and within-die variations become significant which cause timing uncertainty. This paper prop...
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project th...
V. Chandramouli, Jesse Whittemore, Karem A. Sakall...