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DSD
2002
IEEE
88views Hardware» more  DSD 2002»
14 years 2 months ago
The Synthesis of a Hardware Scheduler for Non-Manifest Loops
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near ...
Omar Mansour, Egbert Molenkamp, Thijs Krol
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
14 years 1 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...
EH
2000
IEEE
168views Hardware» more  EH 2000»
14 years 1 months ago
The GOLEM Project: Evolving Hardware Bodies and Brains
The GOLEM project is an attempt to extend evolutionary techniques into the physical world by evolving diverse electro-mechanical machines (robots) that can be fabricated automatic...
Jordan B. Pollack, Hod Lipson
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
14 years 1 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
ASPDAC
2007
ACM
115views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware
- This paper covers a multi-functional hardware intellectual property (IP) for the encoding and decoding of digital moving pictures with low power consumption. The IP is mainly int...
M. Hase, K. Akie, M. Nobori, K. Matsumoto