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FMCAD
2009
Springer
14 years 2 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
RECOMB
2003
Springer
14 years 8 months ago
Finding recurrent sources in sequences
Many genomic sequences and, more generally, (multivariate) time series display tremendous variability. However, often it is reasonable to assume that the sequence is actually gene...
Aristides Gionis, Heikki Mannila
DATE
2002
IEEE
79views Hardware» more  DATE 2002»
14 years 21 days ago
Incremental Diagnosis and Correction of Multiple Faults and Errors
An incremental simulation-based approach to fault diagnosis and logic debugging is presented. During each iteration of the algorithm, a single suspicious location is identified a...
Andreas G. Veneris, Jiang Brandon Liu, Mandana Ami...
BCS
2008
13 years 9 months ago
Dynamic Neighbourhood Cellular Automata
We propose a defi nition of Cellular Automaton in which links between cells can change during the computation. This is done locally by each cell, which can reach the neighbours of...
Stefan S. Dantchev
IJRR
2010
115views more  IJRR 2010»
13 years 5 months ago
Improving the Efficiency of Clearing with Multi-agent Teams
We present an anytime algorithm for coordinating multiple autonomous searchers to find a potentially adversarial target on a graphical representation of a physical environment. Th...
Geoffrey Hollinger, Sanjiv Singh, Athanasios Kehag...