— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
In our previous work [1, 2] we studied detection of anomalies in packet arrival times for computer networks, most detection of denialof-service (DoS) attacks in Internet traffic....
Visual sensors provide exclusively uncertain and partial knowledge of a scene. In this article, we present a suitable scene knowledge representation that makes integration and fusi...
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
We propose a novel method for automatically discover-ing key motion patterns happening in a scene by observing the scene for an extended period. Our method does not rely on object ...